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Silicon Labs /SiM3_NRND /SIM3L167_C /LCD_0 /VBMCONTROL

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Interpret as VBMCONTROL

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31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0VBMTH0 (NOT_SET)VBMBF 0VBMCLKDIV 0 (DISABLED)VBMCDEN 0 (DISABLED)VBMOEN 0 (DISABLED)VBMEN

VBMOEN=DISABLED, VBMEN=DISABLED, VBMCDEN=DISABLED, VBMBF=NOT_SET

Description

VBAT Monitor Control

Fields

VBMTH

VBAT Monitor Threshold.
VBMBF

VBAT Monitor Busy Flag.

0 (NOT_SET): An update of the internal VBAT monitor registers is not in progress.

1 (SET): The internal VBAT monitor registers are busy updating.
VBMCLKDIV

VBAT Monitor Clock Divider.
VBMCDEN

VBAT Monitor Capacitor Divider Enable.

0 (DISABLED): Disable the VBAT monitor capacitor divider.

1 (ENABLED): Enable the VBAT monitor capacitor divider.
VBMOEN

VBAT Monitor Offset Enable.

0 (DISABLED): The VBAT monitor threshold set by the VBMTH field functions as an absolute threshold value for the VBAT monitor.

1 (ENABLED): The VBAT monitor threshold set by the VBMTH field functions as an offset to the LCD contrast value set by CTRSTMD.
VBMEN

VBAT Monitor Enable.

0 (DISABLED): Disable the VBAT monitor.

1 (ENABLED): Enable the VBAT monitor.

Links

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Register Reference

https://github.com/cmsis-svd/cmsis-svd-data